syscokid wrote: ↑Sat Jun 18, 2022 5:11 pm
Whether my assumptions and calculations are correct,
You are calculating dc voltage drops. But none of those dc voltages even get to the send jack or V4B. Those dc voltages are blocked by C12 coupling cap.
syscokid wrote: ↑Sat Jun 18, 2022 5:11 pm
Whether my assumptions and calculations are correct,
You are calculating dc voltage drops. But none of those dc voltages even get to the send jack or V4B. Those dc voltages are blocked by C12 coupling cap.
Thank you. Oblivious to the cap being there. Oblivious that this an AC signal pass. How does the DC voltage drop affect the signal after the cap?
syscokid wrote: ↑Sat Jun 18, 2022 5:11 pm
Whether my assumptions and calculations are correct, or not, have you or anybody else, actually implemented this mod? I can't really tell if Lothy's response is a thorough implementation of your schematic mod...
Greg
Hi Greg,
I've implemented it and it works. It pulls the overall signal down a bit, when the loop is in use, but that can be leveled out by the master volume.